JUNIOR ELECTRONIC ENGINEER

Required qualification:
Master's Degree in Electronic Engineering (5 years)


Required experience:
3 to 5 years in the sector of the design and/or the verification and/or the analysis of digital architectures


Desired experience:
Knowledge of digital architectures of System on Chip based on programmable cores. Experience in the FMEDA analysis.


Main tasks:

  • RTL and gate level digital simulation of complex Systems of Chip for fault injection based on the Synopysis toolchain.
  • Management of the firmware development for ARM and MIPS multicore architectures on microcontroller based systems (work team with 2-3 members).
  • FMEDA analysis of HW architectures for indipendent/assisted driving automotive systems.


Availability:
Immediate, but the integration during the 2019 is took into consideration


Location:
Pontedera.


Business trips:
Low chance of short national and international business trips.